The American U.S. Pat. No. 4,930,066 discloses a memory system comprising a plurality of data input/output ports for providing page addresses, a plurality of memory banks for storing pages of data and a switching network for rotating connections between the data input/output ports and the memory banks. An address is transmitted to the memory system in association with the data. The described system comprises therefore, for each input/output port an interface for receiving the data and the associated address. This results in delays when storing data. Moreover this interface is complex in terms of hardware. Besides a memory bank is accessible for either reading or writing but not both. A memory access conflict may occur when a memory bank is selected for both receiving a data to be written and providing a data to be read. The configuration described here is prone to conflicts when two different ports need to access two pages located in the same bank.